Center for Analog and Mixed Signal

The Center for Analog and Mixed Signal (AMS) conducts research in the area of analog and mixed signal integrated circuit. Our research projects seek solutions to the some of the most challenging issues faced by semiconductor industry today through developing new circuits and architectures.


Intelligent CMOS Terahertz Integrated Circuit
Terahertz science and technology have attracted attention due to the huge bandwidth of THz waves and its potential for use in extra ordinary applications such as non-harmful biomedical imaging, radar, spectroscopy as well as high-rate short-range wireless communication. The members of center for analog and mixed signal are working on short-range wireless communication in the range of 0.2-0.4THz center frequency. To be able to operate CMOS transistor at terahertz band, some neutralization techniques are required. The conventional neutralization techniques provide a narrowband operation. The main focus of this project is to develop an intelligent TRX system for next generation transceivers. The proposed system will adjust the bandwidth and other important parameters associated with the TRX
Wireline Communication ICs (SerDes)

With the exponential growth of Internet nodes, the volume of the transported data has been increasing. The load on the global Internet backbone will soon increase to tens of terabits per second. According to some experts, backbone bandwidth requirement increases by a factor of 50 to 100 every seven years. The team is working on data communication integrated circuits to improve the performance and speed, and reduce the power dissipation. Most of the power reduction techniques degrade the system performance. On the other hand, exciting CMOS technology facilitates using a digital calibration system on the same die as analog circuit (so called analog mixed signal system on chip). The main focus on this project is to use digital circuits along with power reduction techniques in analog blocks to achieve a low power solution while maintaining the required performance.

ICs for Biomedical Implantable Device

Low power ADC (Analog to Digital Converter) has always been a prime demand in the biomedical engineering field due to the lack of any external power source and limited availability of heat dissipation. The SAR (Successive Approximation Register) ADC architecture is well suitable for large-scale wireless sensor networks and bio-medical applications due to its moderate speed, moderate resolution and very low-power consumption characteristics. This project is about designing an SAR ADC with low power and low voltage, which is suitable for biomedical engineering application

Secure and Anti-Counterfeit Integrated Circuit

Security has been one of the important design dimensions in the integrated circuit design in both digital and analog domain. In today’s world, Integrated Circuits (IC) must be not only of low power and of high performance, but it should be also secure to the various Side Channel Attacks (SCA). Some examples of SCA are Simple Power Analysis, Differential Power Analysis (DPA) and Timing Analysis. The team is working on design and implementation of robust crypto processors, such as AES, 3DES and ECC. Our effort is to increase the immunity by elaborating some of analog and digital noise reduction techniques.


Recent Publication (from 2011- )


1- S. Moghadami, S. Ardalan, A 205GHz Amplifier with 10.5dB Gain and -1.6dBm Saturated Power Using 90nm CMOS, IEEE Microwave and Wireless Components Letters, vol. 26, no. 3, pp. 207-209, March 2016

2- S. Pazouki, A. Mohsenzadeh, S. Ardalan, M. Haghifam, Optimal Place, Size and Operation of CHP in Multi Carrier Energy Networks Considering Reliability, Loss and Voltage Profile, The Institution of Engineering and Technology (IET), Generation, Transmission & Distribution, vol. 10, no. 7, pp. 1615-1621, 2016.

3- S. Moghadami, F. JalaliBidgoli, S. Ardalan, Systematic Approaches for Analysis and Design of Terahertz and Millimeter-Wave Integrated Circuits Using Carbon Nanotube FETs, IEEE Canadian Journal of Electrical and Computer Engineering, vol. 39, no. 2, pp. 92-102, Spring 2016.

4- S. Pazouki, S. Ardalan, M. Haghifam, Demand Response Programs in Optimal Operation of Multi-Carrier Energy Networks,, Ind. Jrounal of Science and Technology, Vol. 8, Issue 33, Dec 2015

5- S. Moghadami, I. Jacob, S. Ardalan, A 0.2 to 0.3THz CMOS Amplifier with Tunable Neutralization Technique , IEEE Transactions on Terahertz Science and Technology, vol. 6, no.6, pp1088-1093, Nov 2015

6- S. Moghadami, F. JalaliBidgoli, S. Ardalan, A Portable Life-Detection Embedded System for Finding Survivors , IEEE Embedded Systems Letters, vol. 8, no. 1, pp. 10-13, March 2016

7- S. Moghadami, F. Hajilou, P. Agrawal, S. Ardalan, A 210GHz Fully -Integrated OOK Transceiver for Short -Range Wireless Chip -to -Chip Communication in 40nm CMOS Technology, IEEE Transactions on Terahertz Science and Technology, vol.5, no.5, pp.737-741, Sept. 2015 (The most popular paper on Sep 2015-Jul 2016 among all IEEE Transactions on Terahertz Science and Technology Papers)

8- S. Ardalan, S. Moghadami, S. Jaafari, Motion Noise Cancelation in Heartbeat Sensing using Accelerometer and Adaptive Filter, IEEE Embedded System Letters, vol.7, no.4, pp.101-104, Dec. 2015 (The most popular paper on Jan and Feb 2016 among all IEEE Embedded System Letters Papers)

9- S. Pazouki, A. Mohsenzadeh, S. Ardalan, M. Haghifam, Simultaneous Planning of PEVs Charging Stations and DGs Considering Financial, Technical and Environmental Effects , IEEE Canadian Journal of Electrical and Computer Engineering, vol.38, no.3, pp.238-245, Summer 2015

10- S. Moghadami, S. Ardalan, 8b 0.9V 300MHz Pipelined ADC Using Transistor Healing and Charge Steering Techniques, The Institution of Engineering and Technology, Electronics Letters, Volume 51, Issue 3, Feb 2015

11- S. Pazouki, A. Mohsenzadeh, M. Haghifam, S. Ardalan, Simultaneous Allocation of Charging Stations and Capacitors in Distribution Networks Improving Voltage and Power Loss, IEEE Canadian Journal of Electrical and Computer Engineering, vol. 38, no. 2, pp. 100-105, 2015

12- S. Hamedi-Hagh, M. Siddigui, M. Singh, S. Ardalan, Design of a Variable Gain Amplifier with Digitally Controlled Constant Return Loss, Journal of selected area in Microelectronics (JSAM), Cyber Journals, Aug 2012


1- S. Moghadami, M. Nasrollahpour, Z. Mojdekanlo, S. Meysami, S. Ardalan, Medical Imaging with Maxwell's Lifetime Achievment: A Reliability Comparison From mm- Wave to X-Ray, IEEE International Reliability Innovations Conference, San Jose, 2016 (Best Paper Award)

2- D. Mazidi, S. Ardalan, Increasing ADC's Sampling Circuit Reliability with Respect to Transistor Aging, IEEE International Reliability Innovations Conference, San Jose, 2016

3- M. Nasrollahpour, S. Moghadami, S. Ardalan, FinFET and Planar Bulk CMOS Ring Oscillator Reliability Comparison, IEEE International Reliability Innovations Conference, San Jose, 2016

4- S. Ardalan, A 0.21THz Fully-Integrated CMOS TRX for Short-Range Wireless Chip-to-Chip Communication, Governmental Microcircuit Application & Critical Technology Conference, March 2016

5- S. Ardalan, The World's First Tunable CMOS Terahertz Amplifier, Governmental Microcircuit Application & Critical Technology Conference, March 2016

6- S. Ardalan, Power Masking for DPA Prevention, Governmental Microcircuit Application & Critical Technology Conference, March 2016

7- F. Hajilou, D. Mazidi, S. Ardalan, DPA Resistance Enhancement through a Self-Healing PLL Based Power Mask, 12th International Conference on Security and Cryptography (SECRYPT), Colmar, France, 2015

8- D. Mazidi, S. Ardalan, Effects of Transistor Aging on Phase Lock Loop, IEEE International Reliability Innovations Conference, San Jose, 2015

9- F. Hajilou, S. Ardalan, A Low Power PLL-Based Technique Against DPA Side Channel Attack, IEEE International Reliability Innovations Conference, San Jose, 2015

10- S. Moghadami, F. JalaliBidgoli, S. Ardalan, A Systematic Methodology to Design High Power Terahertz and Millimeter-Wave Amplifiers, The 27th IEEE International System-on-Chip Conference, Las Vegas, USA, 2014

11- S. Ardalan, Y. Feng, Digital Lock-Detection for Systematic Phase Noise Elimination in a Phase Interpolator CDR, The 12th IEEE International New Circuits and Systems Conference, 2014 (NEWCAS 2014)

12- S. Ardalan, S. Panwalkar, M. Ali, Behavioral and Transistor Modeling of Multi-Phase Injection Ring Oscillator, The 27th IEEE Canadian Conference on Electrical and Computer Engineering, 2014, Toronto, Canada

13- M. Rezvani, S. Ardalan, K. Raahemifar, High Gain, Low power, CMOS Current Reused LNA with Noise Optimization, The 26th IEEE Canadian Conference on Electrical and Computer Engineering, 2013, Regina, Canada

14- S. Raju, S. Ardalan, S. hamedi-Hagh, R. Balasubramanyam, Digital LNBC for Radio Astronomy, Collaboration for Astronomy Signal Processing and Electronics Research, 2012

15- A. Khatib-Zadeh, C. Gebotys, S. Ardalan, Counteracting Power Analysis Attack Using Static Single-Ended Logic, IEEE International Symposium on Circuit and System(ISCAS), 2011, Rio de Janeiro, Brazil



Dr. Shahab Ardalan

Current Graduate Students:

1- Rahul Sreekumar*: Time Interleaved SAR ADC

2- Iman Adibi*: mm-wave CMOS amplifier

3- Mehdi Nasrollahpour*: Low-Power Time Based Flash ADC in 65nm CMOS

4- Fleura Hajiloo*: Meta-Stability Calibration for Alexander Phase Detector (PLL Based CDR)

5- Heng Tony Zhang: Object detection / replacement Engine for video application

Former Graduate Students:

1- Kalaivani Muthaiyan: Wideband Phase Locked Loop with Noise Calibration

2- Subha Krishnasamy: VCO Phase Noise Calibration

3- Priyanka Agrawal: 28Gbps CTLE with inductive Peaking

4- Siavash Moghadami*: Intelligent Silicon Based TeraHertz and mm-Wave Integrated Circuit and System

5- Chengyuan Zhong*: 10 Gbps Full Rate PLL based CDR in 45nm CMOS

6- Daniel Mazidi*: Low Power Flash ADC

7- Jay Shah: Noise in CMOS Circuits during Transition

8- Supriya Kaliraj: Low Noise Phase Lock Loop with Injection Locking Oscillator

9- Muhammad Ali Shaikh: Stocastical TDC based Digital PLL based CDR

10- Julian Pinto: TDC based Digital PLL based Synthesizer

11- Satish Aditya Yanamandra : StrongArm Based Time to Digital Converter

12- Harsha Srirangam: TDC based Digital PLL based Synthesizer

13- Shuai Zhao: A 6b, Low Power, Flash ADC with Offset Cancelation in 45nm CMOS

14- Glee Wilson: Wireless Microphone System Over ZigBee Netwroks

15- Aparna Trade: Hadoop Profiling based on X86 Processor

16- Krupali Shah: Hardware Accelarator for Hadoop

17- Vivek Singh: Distributed Verification System

18- Meera Ananda Kumar: Design of High Performance SHA-256 Cryptographic Processor

19- Deepika Vyas: A New Technique of Phase Detection for CDR

20- Xing Su: Micorstrip Antenna Array in Beamforming Configuration for SISO System

21- Jacob Isaac*: A Time-Interleaved SAR ADC in 45nm CMOS

22- Gustavo T. Villanueva: 10 GHz Adaptive Receiver Equalization Design in 28nm CMOS

23- Samira Jaafari*: Adaptive Filtering for Heart Rate Signals

24- Sagar Waghela*: Meta-Stability Calibration for Alexander Phase Detector (PLL Based CDR)

25- Poonam Agale: CMOS Low Voltage Continuous Time Linear Equalizer for Video Application

26- Siddharth Bhardwaj: Digital Phase Locked Loop for High Speed Wire-line Link

27- Nisha Doshi: Digital Phase Locked Loop for High Speed Wire-line Link

28- Chris Ng: A Generic Platform for Analog Peripherals for Embedded System

29- Mohammad Rezvani*: CMOS low noise amplifier for wireless body area network; techniques and design

30- Natalia Lo: CMOS Clock Generator & Serializer

31- Muhammad Zain Ali*: Low Power Analog To Digital Converter Design For Software Defined Radio's

32- Alfred Sargezisardrud*: Delay Flip-Flop (DFF) Metastability impact on Clock , Data Recovery (CDR) and Phase-Locked Loop (PLL) circuits

33- Anwar Aslam: A design of a 10Gb/s CDR using Injection Locking in 45nm CMOS

34- Swathi Medavaram: Digital PLL based Clock Data Recovery

35- Darshan Moodgal Devendrappa: Design of a Continuous Time Sigma Delta Modulator (CTDSM)

36- Han Zhang*: System Level Modeling And Circuit Design For Low Voltage CMOS Equalizer For Coaxial Cable For Video Application

37- Yu Feng*: Novel Systematic Phase Noise Reduction Techniques for Phase Interpolator Clock and Data Recovery

38- Shweta S Panwalkar: Low-Noise Injection Locking Ring Oscillator for CDR Architecture

39- Sulakshan Taank: PLL-ILO for Clock and Data Recovery Using LC Oscillator

40- MuthuKumar Thangavel: Injection Lock Oscillator for Clock Data Recovery Circuits

41- Kedar Patel: A Low Power, Low Voltage SAR ADC for Biomedical Application

42- Bhairav Desai: DPA Attack on 3DES Crypto Processor

43- Manan Patel: 3DES Crypto Processor

44- Purvi Patel: Robust ECC Processor

45- Pallavi Shinde: DPA Attack on ECC Processor

46- Sara Asaadi: FPGA Based Motion Control System in High Radiation Environment



EE-125: Analog CMOS IC

This course studies advanced CMOS integrated circuit design techniques and consideration. Design and analysis of basic building block and elementary analog circuits are covered to provide a foundation for advanced designs. Both practical design, layout, simulation and verification issues will be emphasized. Analog system modeling using Verilog-A will be discussed and concept of noise and associated mitigation technique will be introduced. Design and Analysis of essential blocks such as comparator, track and hold, switched capacitor circuits, amplifiers will be covered. The course studies system level architecture and building blocks of flash and pipeline Analog to digital converter. Furthermore, considerable effort will be devoted towards noise analysis with mathematical approach and CAD tools.

Design of Analog CMOS Integrated Circuits, B. Razavi, McGraw-Hill, 2001

Analog Integrated Circuit Design, T. C. Carusone, D. A. Johns, K. W. Martin, John Wiley & Sons Inc., 2011, 2nd Edition

EE-227: Signal Integrity in AMS IC

This course studies essential blocks for wire-line communication integrated circuits such as analog equalizer circuits, Decision-Feedback Equalization (DFE), Phase Looked Loop (PLL) and Clock and Data Recovery (CDR) circuits. True understanding of system level modeling and behavioral of the PLL will be discussed. Matlab/Simulink Modeling techniques will be introduced as new vehicle for system level design and simulation. Performance metrics such as random jitter, BER, jitter transfer jitter tolerance, phase noise and . will be introduced. Integrated circuit design consideration for the key essential blocks for PLL and equalizer block will be covered.

Reference: Instructor course notes

Design of Integrated Circuits for Optical Communications”, B. Razavi, 2nd Edition, John Wiley & Sons

EE-288: Integrated CMOS Data Conversion Circuits

This course studies different architectures for integrated analog to digital converters and digital to analog converters. System level modeling and simulation using Matlab and Simulink. Design considerations and techniques for circuit implementation. The key essential blocks such as sampler, track-and-hold and voltage comparator will be explained in circuit level. Techniques and methods for data converters testing will be covered.

Reference: Instructor course notes

Data Conversion System Design, B.Razavi, IEEE Press, 1995

CMOS Data Converters for Communications, Gustavsson, Wikner, Tan, Kluwer, 200

EE-224: High Speed Digital CMOS Circuits

The course will cover transistor level design and consideration for high speed digital CMOS design.

Reference: Digital Integrated Circuits, Jan Rabaey, Prentice Hall, 2nd Edition

EE-124: Electronic Circuit II

This course teaches design of fundamental building blocks for Analog integrated circuits. It begins with analysis and design of current sources and active loads using CMOS transistors. Design of singlestage and differential-pair amplifiers with their frequency response is introduced. Impact of feedback on input and output resistances as well as voltage and current gains is analyzed. Design of output stages and operational amplifiers are discussed. Frequency compensation and power-bandwidth optimization in amplifiers are also studied.

Reference: Instructor course notes

Microelectronic Circuits, 6th Edition, by Sedra and Smith, Oxford University Press, 2010

Fundamentals of Microelectronics, 2nd Edition, by Behzah Razavi, John Wiley, 2012

AMS Track

This is the suggested path for students who are interested in analog and mixed signal integrated circuit track

A mixed-signal integrated circuit is any integrated circuit that has both analog circuits and digital circuits on a single semiconductor die. Such as Data Convertors(ADC/DAC), Phase Lock Loops, Digitally assisted analog circuits, network switches and etc

Contact Info

Dr. Shahab Ardalan

Centre for Analog Mixed Signal

ENG 321

Electrical Engineering Department

San Jose State University

Tel: 1-408-924-4075

Fax: 1-408-924-3925